Specifications

Feature

Xcellon-Flex 4x40GbE QSFP+ Full Emulation Load Module

Load module model

FlexFE40G4Q

Number of ports per load module

4-ports of 40GbE QSFP+

Chassis slots per module

1

Maximum ports per chassis:

XGS12-SD: 48-ports 40GbE QSFP+

XGS12-SD rackmount: 48-ports 40GbE QSFP+

XG12 rackmount (6000W): 48-ports 40GbE QSFP+

XM12 High Performance (4000W): 24-ports 40GbE QSFP+

XM2 Desktop: 4-ports 40GbE QSFP+[1]

QSFP+ media support

 

40GBASE-SR4 and 40GRBASE-LR4 pluggable, optical transceivers

40GBASE-SR4 active optical fiber cables (AOC)

40GBASE-CR4 passive, copper direct attached cables up to 5 meters in length

Multi-core processor technology

Yes

Interface protocols

IEEE802.3ae10GbE LAN

IEEE802.3ba 40GBASE-R LAN

Data center protocols

(see optional upgrades for DCBX, FCoE, FCF)

PFC, FCoE /FIP, LLDP/DCBX, VNTAG/VNIC, VEPA, FabricPath, TRILL, SPBM, OpenFlow, VXLAN, Segment Routing ISIS

Layer 2-3 routing protocol emulation support

Yes

Capture buffer per port

256MB

Transmit engine

Wire-speed packet generation with timestamps, sequence numbers, data integrity signature, and packet group signatures

Stream definitions per port

256[2]

Number of transmit flows per port (sequential values)

Billions

Number of transmit flows per port (PGID)

1 million

Table UDF

1 million entries

User defined field features

Fixed, increment, or decrement by user-defined step, value lists, cascade, random, and chained

Data field per stream

Fixed, increment (byte/word), decrement (byte/word), random, repeating, user-specified

Frame length controls

Fixed, random, weighted random, or increment by user-defined step

Error generation

CRC (good/bad), undersize, oversize

IPv4, IPv6, UDP, TCP checksum

Hardware checksum generation and verification

Receive engine

Wire-speed packet filtering, capturing, real-time latency, and inter-arrival time for each packet group, data integrity, and sequence checking

Trackable receive flows

64K per port

Filters

48-bit source/destination address, 2x128-bit user-definable pattern and offset, frame length range, CRC error, data integrity error, sequence checking error (small, big, reverse)

Statistics and rates

(counter size: 64 bits)

Link state, line speed, frames sent, valid frames received, bytes sent/received, fragments, undersize, oversize, CRC errors, VLAN tagged frames, 6 user-defined stats (UDS), capture trigger (UDS 3), capture filter (UDS 4), 8 QoS counters, data integrity frames, data integrity errors, sequence checking frames, sequence checking errors, ARP, and ping requests and replies

Flow control

IEEE802.03x PAUSE frame control

IEEE802.1Qbb (PFC)

Link fault signaling at 40GbE

Generate local and remote faults with controls for the number of faults and order of faults, plus the ability to select the option to have the transmit port ignore link faults from a remote link partner

Latency measurements

2.5ns resolution in packet timestamp

Intrinsic latency adjustment

Ability to remove inherent latency from 40GbE port electronics when used with MSA-compliant 40GbE transceivers

Transmit line clock adjustment

Ability to adjust the parts per million (ppm) line frequency over a range of -100 to +100 ppm

40GbE physical coding sublayer (PCS) test features:

IEEE 802.3ba-compliant PCS transmit and receive side test capabilities

  • Per PCS lane, transmit lane mapping

Supports all combination of PCS lane mapping: Default, Increment, Decrement, Random, and Custom

  • Per PCS lane, skew insertion capability

User-selectable from zero up to 3 microseconds of PCS Lane skew insertion on the transmit side.

  • Per PCS lane, lane marker, or lane marker and payload error injections

User-selectable ability to inject errors into the PCS Lane Marker and simultaneously into PCS Lane Marker and Payload fields. This includes the ability to inject sync bit errors into the Lane Marker and Payload. User can control the PCS lane, number or errors, and period count; and manage the repetition of the injected errors.

  • Per PCS lane, receive lanes statistics

PCS Sync Header and Lane Marker Lock, Lane Marker mapping, Relative lane deskew up to 52 microseconds, Sync Header and PCS Lane Marker Error counters, indicators for Loss of Synch Header and Lane Marker, BIP8 errors

Xcellon-Flex 4x40GbE QSFP+ Full Emulation Load Module

Operating temp. range

41°F to 86°F (5°C to 30°C), ambient air temperature[3]

Load module dimensions

16.90” (L) x 12.00” (W) x 1.28” (H)

429mm (L) x 305mm (W) x 33mm (H)

Weight

Module only: 11.55 lbs (5.25 kg)

Shipping: 13.85 lbs (6.29 kg)

 

Application Support

Xcellon-Flex 4x40GbE QSFP+ Full Emulation Load Module

IxExplorerTM: Layers 1, 2, and 3 wire-speed traffic generation, capture, and analysis.

IxExplorer Tcl API: Custom user script development for layer 1-3 testing.

IxNetwork: Provides wire-rate traffic generation with service modeling that builds realistic, dynamically-controllable data-plane traffic. IxNetwork offers the industry's best test solution for functional and performance testing by using comprehensive emulation for routing, MPLS, VPLS, high-availability, IP multicast, switching, carrier Ethernet, broadband, and DCB protocols.

IxNetwork Tcl API: Custom user script development for layer 2-7 testing.

 

[1] The XM2 portable chassis (941-0003) supports up to 1 FlexFE40G4Q load module. No other load module may be installed in the XM2 portable chassis when a FlexFE40G4Q load module is installed.

[2] In the Data Center Bridging mode the number of transmit streams per port on the FlexFE40G4Q load module is 256 streams.

[3]When an Xcellon-Flex load module is installed in an XM12 chassis, the maximum operating temperature of the chassis is 30°C (86°F) ambient air temperature.

Key Features
  • High performance multicore processor for each 40GE QSFP+ port
  • High L2/3 and L4-7 protocol scalability
  • Data center ready
  • PCS Lanes testing for compliance to IEEE802.3ba standard
  • Compatible with XGS12-SD, XGS12-HS, XGS2-SD and XGS2-HS chassis
  • Supports the IxNetwork and IxLoad test applications for Layer 2-7 support

The advancement of high-density, high-performance network switches, routers, aggregation devices, network appliances, and servers has accelerated since the standardization of 40GE. Ixia has consistently kept pace with the testing demands of network equipment manufacturers (NEMs), service providers, enterprises, and governments by continually increasing port density and protocol scalability.

Xcellon™ is Ixia’s high-performance architecture for testing next-generation networks and devices. Wired and wireless networks are converging over IP, and service providers must ensure quality delivery of the bandwidth-hungry, media-rich services that their customers demand. Cloud computing and data center convergence are changing the dynamics of business IT, while security threats are becoming more sophisticated by the day. All of these developments point to the need for more capable and scalable test solutions.

Ixia’s Xcellon-Flex 4x40GE Full Emulation load module offers Full Emulation 40GE QSFP+ native load ,module, with 4 ports on a single slot load module. The 4x40GE load module has a rich L1-7 feature set and is well-suited for mid-to-high range L2-3 protocol emulation and scale testing at an affordable price.